FPGA原理与应用课程设计 下载本文

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南京理工大学

FPGA原理与应用

课程设计

2017年12月

摘 要

BiSS通信协议是一种全双工同步串行总线通信协议,专门为满足实时、双向、高速的传感器通信而设计,在硬件上兼容工业标准SSI(同步串行接口协议)总线协议。其典型应用是在运动控制领域实现伺服驱动器与编码器通信。BiSS由德国IC-HAUS公司开发,现已成为传感器通信协议的国际化标准。

在本课题的设计中采用基本组网方式,即点对点方式。设计中使用xilinx公司的ISE软件,应用Verilog语言设计了BiSS通信中的主通信设备和从通信设备,设定数据帧的格式,并在测试向量中模拟顶层的数据申请信号,在ISim Simulator中观察仿真结果。在MA时钟频率为10MHz的情况下,主设备接收到的数据与从设备发送的数据相同,即完成了设计要求。

关键词:BiSS通信;FPGA;Verilog

Abstract

The BiSS communication protocol is a full-duplex synchronous serial bus communication protocol designed to meet real-time, bidirectional, high-speed sensor communication and is hardware compatible with the industry standard SSI (Synchronous Serial Interface Protocol) bus protocol. Its typical application is to realize servo driver and encoder communication in the field of motion control. Developed by IC-HAUS, Germany, BiSS has become an international standard for sensor communication protocols.

In the design of this topic using the basic networking, that is, point to point mode. The design uses ISE software of xilinx company, designs the master communication device and the slave communication device in BiSS communication by using Verilog language, sets the format of the data frame, and simulates the top data application signal in the test vector, observes in ISim Simulator Simulation results. When the MA clock frequency is 10MHz, the data received by the master is the same as the data sent by the slave, that is, the design requirement is completed.

Keywords: BiSS communication;FPGA;Verilog