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电子科技大学2014 - 2015 学年第 二 学期期 中 考试卷

课程名称：数字逻辑设计及应用 考试形式：闭卷 考试日期：2015年5月10日 考试时长：120分钟

课程成绩构成：平时 30/20 %， 期中 30/20 %， 小班讨论 0/20 %， 期末 40 % 本试卷试题由__VII___部分构成，共__6___页。

题号 得分 得 分 I. Please fill out the correct answers in the brackets “( )” . ( 2’ X 20 = 40’ )

1. [510.5] 10 = ( 111111110.1 )2 = ( 1FE.8 ) 16

2. (2015)10 =( 0010000000010101 )8421BCD =( 0101001101001000 ) Excess-3

3. If X’s signed-magnitude representation XSM is 000110102, then (2X)’s 8-bit two’s

complement representation is ( 00110100 ), and (-X/2)’s 8-bit two’s complement representation is ( 11110011 ). 4. If a logic function is

(0,4,5,7),

is

.(0,2,3,7)

and

, its complement expression is

its

dual

expression

I II III IV V VI VII 合计 5. For CMOS inverters, can different outputs of common CMOS inverters be connected together?

[Yes or No] ( No ); Three-state inverters have three-state outputs, which are HIGH、LOW and ( Hi-Z ). Can different outputs of three-state inverters be connected together? [Yes or No] ( Yes ). 6. Given a binary number X=101101012, its corresponding Gray code is ( 11101111 ).

7. If [X] two’s-complement =0111 00112, [Y] two’s-complement =1001 11002, then [X-Y] two’s-complement=（ 10101001 ），whether overflow occurs? [Yes or No] ( Yes ). 8. Given 126 different states, it requires at least (

7 ) binary bits to represent them.

9. For CMOS NOR gates, their unused inputs should connect to ( 0 ) state.

10. From Table 1 below, if 74HC devices drive 74LS devices,

in HIGH state , DC noise margin VNH is ( 1.84 ), Fan-out NH is ( 200 ); in LOW state , DC noise margin VNL is ( 0.47 ), Fan-out NL is ( 10 ).

Table 1

Description

LOW-level input voltage (V) LOW-level output voltage (V) HIGH-level input voltage (V) HIGH-level output voltage (V) LOW-level input current (uA) LOW-level output current (mA) HIGH-level input current (uA) HIGH-level output current (mA)

Symbol VILmax VOLmax VIHmin VOHmin IILmax IOLmax IIHmax IOHmax

Family 74LS 0.8 0.5 2.0 2.7 -400 8 20 -0.4

74HC 1.35 0.33 3.85 3.84 1 4 -1 -4

得 分

II. Choose the correct answer and fill the item number in the brackets. (Single

selection for question 1~8, Multi-selection for 9~10, 2’ X 10=20 ) 1. For logic function

( C ) A. C.

B.

D.

, its minimal sum is

2. Given a circuit design, its output expression with positive logic is

then its output expression with negative logic is ( A.

B.

C

)

,

C. D.

3. For the priority encoder 74X148, its inputs are: I0-L, I1-L, I2-L, I3-L, I4-L, I5-L, I6-L, I7-L，outputs

are Y2-L,Y1-L,Y0-L. The inputs and outputs are all active-low. When active-low enable input EN_L=0, I1-L = I5-L = I4-L =0, and any other inputs are all 1, then Y2-L, Y1-L, Y0-L is ( B ).

A. 110 B. 010 C. 001 D. 101 4. Except enable lines, an 8-1 multiplexer should have ( C ) control/select lines. A. 1 B. 2 C. 3 D. 4 5. The truth table of a circuit is shown in Table 2, the logic expression of this circuit is ( D ).

A. F=A+B B. F=S+A+B C.

Table 2 S 0 0 0 0 1 1 1 1 6. In one number system

B ) A. 5

B. 6

C. 7

B

B) D)

D. 8 )

A 0 0 1 1 0 0 1 1 B 0 1 0 1 0 1 0 1 F 0 1 0 1 0 0 1 1 is correct, its radix is ( D.

7. In figure 1, the output logic function is (

A) C)

ABCDEFigure 1

VccY

8. If the minimal sum of a logic function is same as canonical sum, it may have ( A. static-0 hazard

B. static-1 hazard

D ).

C. both static-0 hazard and static-1 hazard D. neither static-0 hazard nor static-1 hazard